1#ifndef PROTEUS_CORE_LLVM_CUDA_HPP
2#define PROTEUS_CORE_LLVM_CUDA_HPP
4#include <llvm/ADT/SmallVector.h>
5#include <llvm/ADT/StringRef.h>
6#include <llvm/CodeGen/MachineModuleInfo.h>
7#include <llvm/IR/LegacyPassManager.h>
8#include <llvm/IR/Module.h>
9#include <llvm/Support/MemoryBufferRef.h>
10#include <llvm/Support/TargetSelect.h>
11#include <llvm/Target/TargetMachine.h>
26 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.nctaid.x"};
31 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.nctaid.y"};
36 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.nctaid.z"};
41 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ntid.x"};
46 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ntid.y"};
51 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ntid.z"};
56 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ctaid.x"};
61 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ctaid.y"};
66 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.ctaid.z"};
71 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.tid.x"};
76 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.tid.y"};
81 static SmallVector<StringRef> Names = {
"llvm.nvvm.read.ptx.sreg.tid.z"};
88 int MinBlocksPerSM = 0) {
89 auto *M = F.getParent();
90 NamedMDNode *NvvmAnnotations = M->getNamedMetadata(
"nvvm.annotations");
91 assert(NvvmAnnotations &&
"Expected non-null nvvm.annotations metadata");
92 auto *FuncMetadata = ConstantAsMetadata::get(&F);
94 auto SetMDNode = [&](
const char *MDName,
int MDValue) {
95 auto *MDNodeName = MDString::get(M->getContext(), MDName);
96 auto *MDNodeValue = ConstantAsMetadata::get(
97 ConstantInt::get(Type::getInt32Ty(M->getContext()), MDValue));
99 for (
auto *MetadataNode : NvvmAnnotations->operands()) {
101 assert(MetadataNode->getNumOperands() == 3);
103 auto *PtrMetadata = MetadataNode->getOperand(0).get();
104 auto *DescMetadata = MetadataNode->getOperand(1).get();
105 if (PtrMetadata == FuncMetadata && MDNodeName == DescMetadata) {
106 MetadataNode->replaceOperandWith(2, MDNodeValue);
110 Metadata *MDVals[] = {FuncMetadata, MDNodeName, MDNodeValue};
111 NvvmAnnotations->addOperand(MDNode::get(M->getContext(), MDVals));
116 SetMDNode(
"maxntid", std::min(1024, MaxThreadsPerSM));
117 if (MinBlocksPerSM != 0)
118 SetMDNode(
"minctasm", MinBlocksPerSM);
122 SmallVectorImpl<char> &PTXStr) {
135 std::unique_ptr<TargetMachine> TM = std::move(*TMExpected);
136 TargetLibraryInfoImpl TLII(Triple(M.getTargetTriple()));
137 M.setDataLayout(TM->createDataLayout());
139 legacy::PassManager PM;
140 PM.add(
new TargetLibraryInfoWrapperPass(TLII));
141 MachineModuleInfoWrapperPass *MMIWP =
new MachineModuleInfoWrapperPass(
142 reinterpret_cast<LLVMTargetMachine *
>(TM.get()));
144 raw_svector_ostream PTXOS(PTXStr);
145#if LLVM_VERSION_MAJOR >= 18
146 TM->addPassesToEmitFile(PM, PTXOS,
nullptr, CodeGenFileType::AssemblyFile,
149 TM->addPassesToEmitFile(PM, PTXOS,
nullptr, CGFT_AssemblyFile,
156 <<
"Codegen ptx " << T.
elapsed() <<
" ms\n");
159inline std::unique_ptr<MemoryBuffer>
161 SmallPtrSetImpl<void *> &GlobalLinkedBinaries,
165 SmallVector<char, 4096> PTXStr;
169 PTXStr.push_back(
'\0');
172 nvPTXCompilerHandle PTXCompiler;
174 nvPTXCompilerCreate(&PTXCompiler, PTXStr.size(), PTXStr.data()));
175 std::string ArchOpt = (
"--gpu-name=" + DeviceArch).str();
176 std::string RDCOption =
"";
177 if (!GlobalLinkedBinaries.empty())
179#if PROTEUS_ENABLE_DEBUG
180 const char *CompileOptions[] = {ArchOpt.c_str(),
"--verbose",
182 size_t NumCompileOptions = 2 + (RDCOption.empty() ? 0 : 1);
184 const char *CompileOptions[] = {ArchOpt.c_str(), RDCOption.c_str()};
185 size_t NumCompileOptions = 1 + (RDCOption.empty() ? 0 : 1);
188 nvPTXCompilerCompile(PTXCompiler, NumCompileOptions, CompileOptions));
190 nvPTXCompilerGetCompiledProgramSize(PTXCompiler, &BinSize));
191 auto ObjBuf = WritableMemoryBuffer::getNewUninitMemBuffer(BinSize);
193 nvPTXCompilerGetCompiledProgram(PTXCompiler, ObjBuf->getBufferStart()));
194#if PROTEUS_ENABLE_DEBUG
198 nvPTXCompilerGetInfoLogSize(PTXCompiler, &LogSize));
199 auto Log = std::make_unique<char[]>(LogSize);
201 nvPTXCompilerGetInfoLog(PTXCompiler, Log.get()));
202 Logger::logs(
"proteus") <<
"=== nvPTXCompiler Log\n" << Log.get() <<
"\n";
207 std::unique_ptr<MemoryBuffer> FinalObjBuf;
208 if (!GlobalLinkedBinaries.empty()) {
215 CUresult CURes = cuCtxGetDevice(&CUDev);
216 if (CURes == CUDA_ERROR_INVALID_CONTEXT or !CUDev)
224 CUlinkState CULinkState;
226 for (
auto *Ptr : GlobalLinkedBinaries) {
236 CULinkState, CU_JIT_INPUT_FATBINARY,
237 static_cast<void *
>(ObjBuf->getBufferStart()), 1,
"", 0, 0, 0));
242 FinalObjBuf = MemoryBuffer::getMemBufferCopy(
243 StringRef{
static_cast<char *
>(BinOut), BinSize});
245 FinalObjBuf = std::move(ObjBuf);
249 <<
"Codegen CUDA RTC " << T.
elapsed() <<
" ms\n");
#define PROTEUS_FATAL_ERROR(x)
Definition Error.h:7
#define PROTEUS_TIMER_OUTPUT(x)
Definition TimeTracing.hpp:57
#define proteusNvPTXCompilerErrCheck(CALL)
Definition UtilsCUDA.h:39
#define proteusCuErrCheck(CALL)
Definition UtilsCUDA.h:28
static llvm::raw_ostream & outs(const std::string &Name)
Definition Logger.hpp:25
static llvm::raw_ostream & logs(const std::string &Name)
Definition Logger.hpp:19
Definition TimeTracing.hpp:36
uint64_t elapsed()
Definition TimeTracing.hpp:45
const SmallVector< StringRef > & threadIdxXFnName()
Definition CoreLLVMCUDA.hpp:70
const SmallVector< StringRef > & gridDimYFnName()
Definition CoreLLVMCUDA.hpp:30
const SmallVector< StringRef > & threadIdxZFnName()
Definition CoreLLVMCUDA.hpp:80
const SmallVector< StringRef > & blockIdxZFnName()
Definition CoreLLVMCUDA.hpp:65
const SmallVector< StringRef > & gridDimZFnName()
Definition CoreLLVMCUDA.hpp:35
const SmallVector< StringRef > & gridDimXFnName()
Definition CoreLLVMCUDA.hpp:25
const SmallVector< StringRef > & blockIdxXFnName()
Definition CoreLLVMCUDA.hpp:55
Expected< std::unique_ptr< TargetMachine > > createTargetMachine(Module &M, StringRef Arch, unsigned OptLevel=3)
Definition CoreLLVM.hpp:52
const SmallVector< StringRef > & threadIdxYFnName()
Definition CoreLLVMCUDA.hpp:75
const SmallVector< StringRef > & blockIdxYFnName()
Definition CoreLLVMCUDA.hpp:60
const SmallVector< StringRef > & blockDimYFnName()
Definition CoreLLVMCUDA.hpp:45
const SmallVector< StringRef > & blockDimZFnName()
Definition CoreLLVMCUDA.hpp:50
const SmallVector< StringRef > & blockDimXFnName()
Definition CoreLLVMCUDA.hpp:40
Definition BuiltinsCUDA.cpp:4
void codegenPTX(Module &M, StringRef DeviceArch, SmallVectorImpl< char > &PTXStr)
Definition CoreLLVMCUDA.hpp:121
void setLaunchBoundsForKernel(Function &F, int MaxThreadsPerSM, int MinBlocksPerSM=0)
Definition CoreLLVMCUDA.hpp:87
CodegenOption
Definition Config.hpp:11
std::unique_ptr< MemoryBuffer > codegenObject(Module &M, StringRef DeviceArch, SmallPtrSetImpl< void * > &GlobalLinkedBinaries, CodegenOption CGOption=CodegenOption::RTC)
Definition CoreLLVMCUDA.hpp:160
std::string toString(CodegenOption Option)
Definition Config.hpp:23